SCIANGULA, Gerlando
SCIANGULA, Gerlando
Scuola Sup. di Studi Univ. e Perfezionamento S.Anna di PISA
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Risultati 1 - 5 di 5 (tempo di esecuzione: 0.009 secondi).
Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications
2023-01-01 Sciangula, G.; Casini, D.; Biondi, A.; Scordino, C.; Di Natale, M.
End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware
2024-01-01 Sciangula, Gerlando; Casini, Daniel; Biondi, Alessandro; Scordino, Claudio
End-To-end response-time analysis of DDS-based real-time applications
2026-01-01 Sciangula, Gerlando; Casini, Daniel; Biondi, Alessandro; Scordino, Claudio; Di Natale, Marco
Hardware Acceleration of Deep Neural Networks for Autonomous Driving on FPGA-based SoC
2022-01-01 Sciangula, Gerlando; Restuccia, Francesco; Biondi, Alessandro; Buttazzo, Giorgio
Modeling the SL-LET Paradigm in AUTOSAR Adaptive
2025-01-01 Bellassai, Davide; Sciangula, Gerlando; Scordino, Claudio; Casini, Daniel; Biondi, Alessandro
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| Bounding the Data-Delivery Latency of DDS Messages in Real-Time Applications | 1-gen-2023 | Sciangula, G.; Casini, D.; Biondi, A.; Scordino, C.; Di Natale, M. | |
| End-to-End Latency Optimization of Thread Chains Under the DDS Publish/Subscribe Middleware | 1-gen-2024 | Sciangula, Gerlando; Casini, Daniel; Biondi, Alessandro; Scordino, Claudio | |
| End-To-end response-time analysis of DDS-based real-time applications | 1-gen-2026 | Sciangula, Gerlando; Casini, Daniel; Biondi, Alessandro; Scordino, Claudio; Di Natale, Marco | |
| Hardware Acceleration of Deep Neural Networks for Autonomous Driving on FPGA-based SoC | 1-gen-2022 | Sciangula, Gerlando; Restuccia, Francesco; Biondi, Alessandro; Buttazzo, Giorgio | |
| Modeling the SL-LET Paradigm in AUTOSAR Adaptive | 1-gen-2025 | Bellassai, Davide; Sciangula, Gerlando; Scordino, Claudio; Casini, Daniel; Biondi, Alessandro |