CICERO, GIORGIOMARIA
CICERO, GIORGIOMARIA
Scuola Sup. di Studi Univ. e Perfezionamento S.Anna di PISA
A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving
2021-01-01 Belluardo, L.; Stevanato, A.; Casini, D.; Cicero, G.; Biondi, A.; Buttazzo, G.
A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems
2019-01-01 Biondi, Alessandro; Nesti, Federico; Cicero, Giorgiomaria; Casini, Daniel; Buttazzo, Giorgio Carlo
An I/O Virtualization Framework with I/O-Related Memory Contention Control for Real-Time Systems
2022-01-01 Borgioli, Niccolo; Zini, Matteo; Casini, Daniel; Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio
AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC
2020-01-01 Restuccia, F.; Biondi, A.; Marinoni, M.; Cicero, G.; Buttazzo, G.
Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems
2021-01-01 Casini, Daniel; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio
PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms
2022-01-01 Serra, G.; Fara, P.; Cicero, G.; Restuccia, F.; Biondi, A.
Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms
2022-01-01 Zini, Matteo; Cicero, Giorgiomaria; Casini, Daniel; Biondi, Alessandro
Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone
2018-01-01 Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio Carlo
SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms
2021-01-01 Biondi, A.; Casini, D.; Cicero, G.; Borgioli, N.; Buttazzo, G.; Patti, G.; Leonardi, L.; Bello, L. L.; Solieri, M.; Burgio, P.; Olmedo, I. S.; Ruocco, A.; Palazzi, L.; Bertogna, M.; Cilardo, A.; Mazzocca, N.; Mazzeo, A.
Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology
2023-01-01 Cittadini, Edoardo; Marinoni, Mauro; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio
| Titolo | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|
| A Multi-Domain Software Architecture for Safe and Secure Autonomous Driving | 1-gen-2021 | Belluardo, L.; Stevanato, A.; Casini, D.; Cicero, G.; Biondi, A.; Buttazzo, G. | |
| A Safe, Secure, and Predictable Software Architecture for Deep Learning in Safety-Critical Systems | 1-gen-2019 | Biondi, Alessandro; Nesti, Federico; Cicero, Giorgiomaria; Casini, Daniel; Buttazzo, Giorgio Carlo | |
| An I/O Virtualization Framework with I/O-Related Memory Contention Control for Real-Time Systems | 1-gen-2022 | Borgioli, Niccolo; Zini, Matteo; Casini, Daniel; Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio | |
| AXI HyperConnect: A predictable, hypervisor-level interconnect for hardware accelerators in FPGA SoC | 1-gen-2020 | Restuccia, F.; Biondi, A.; Marinoni, M.; Cicero, G.; Buttazzo, G. | |
| Latency Analysis of I/O Virtualization Techniques in Hypervisor-Based Real-Time Systems | 1-gen-2021 | Casini, Daniel; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio | |
| PAC-PL: Enabling Control-Flow Integrity with Pointer Authentication in FPGA SoC Platforms | 1-gen-2022 | Serra, G.; Fara, P.; Cicero, G.; Restuccia, F.; Biondi, A. | |
| Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms | 1-gen-2022 | Zini, Matteo; Cicero, Giorgiomaria; Casini, Daniel; Biondi, Alessandro | |
| Reconciling security with virtualization: A dual-hypervisor design for ARM TrustZone | 1-gen-2018 | Cicero, Giorgiomaria; Biondi, Alessandro; Buttazzo, Giorgio Carlo | |
| SPHERE: A Multi-SoC Architecture for Next-Generation Cyber-Physical Systems Based on Heterogeneous Platforms | 1-gen-2021 | Biondi, A.; Casini, D.; Cicero, G.; Borgioli, N.; Buttazzo, G.; Patti, G.; Leonardi, L.; Bello, L. L.; Solieri, M.; Burgio, P.; Olmedo, I. S.; Ruocco, A.; Palazzi, L.; Bertogna, M.; Cilardo, A.; Mazzocca, N.; Mazzeo, A. | |
| Supporting AI-powered real-time cyber-physical systems on heterogeneous platforms via hypervisor technology | 1-gen-2023 | Cittadini, Edoardo; Marinoni, Mauro; Biondi, Alessandro; Cicero, Giorgiomaria; Buttazzo, Giorgio |